1. Field of the Invention
Preferred embodiments of the present invention generally relate to a constant-current circuit, and more particularly, to a light-emitting diode drive device using a constant-current circuit for outputting a constant current with high precision and reducing power consumption of the constant-current circuit by lowering an output voltage while maintaining the high precision in outputting the constant current.
2. Discussion of the Related Art
In general, in order to reduce uneven brightness, a light-emitting diode (LED) used for a display device is driven by a constant-current circuit. The constant-current circuit employs an electrode of a drain of a MOS transistor as an output terminal. When a voltage of the output terminal varies greatly, an output current also fluctuates due to a channel-length modulation effect of the MOS transistor. As a result, the brightness of the LED becomes irregular.
So far, several techniques have been proposed for outputting a constant current with high precision. For example, FIG. 7 shows a conventional constant-current circuit. In FIG. 7, NMOS transistors M111, M112, M141, and M142 form a low-voltage cascode-type current mirror circuit, and the constant-current circuit outputs an output current iout that is obtained by multiplying a current iref1 by a ratio of transistor sizes of the NMOS transistors M111 and M112 to an external load 110 connected to an output terminal OUT. An error amplifier OP102 controls an NMOS transistor M116 such that a voltage of a connection point between a resistor R111 and the NMOS transistor M116 becomes a reference voltage Vref. When a value of the resistor R111 is r111, a current iref2 flowing through the resistor R111 is Vref/r111. The current iref2 becomes the current iref1 by being reflexed at PMOS transistors M115 and M114 forming a current mirror circuit.
Since the NMOS transistors M111, M112, M141, and M142 that serve as an output circuit for supplying the output current iout to the external load 110 form the cascode-type current mirror circuit, voltage fluctuation at the output terminal OUT hardly affects the output current iout. However, when an output transistor for supplying the output current iout to the output terminal OUT is formed by connecting the NMOS transistors M112 and M142 in series, even if the output circuit is formed of the low-voltage cascode-type current mirror circuit, the voltage at the output terminal OUT that is required for the output transistor to operate in a saturation region, which enables the output transistor to maintain high precision in outputting a constant current, becomes high.
More specifically, provided that the NMOS transistors M111, M112, M141, and M142 have the same transistor size and the same conductivity, a voltage Vds1 between a drain and a source of the NMOS transistor M112 is represented in the following equation (a), in which a threshold voltage, a voltage between a gate and a source of the NMOS transistor M142, an overdrive voltage, and a bias voltage generated by a bias voltage generator 108 are represented as Vthn, Vgs2, Vov, and Vbias, respectively:Vds1=Vbias−Vgs2  (a)When the bias voltage Vbias is set to a value satisfying an equation Vbias=Vgs2+Vov, such that the NMOS transistor M112 operates in a boundary region between linear and saturation regions, the above equation (a) turns to the following equation (b):Vds1=Vov  (b)When the NMOS transistor M142 also operates in the boundary region between the linear and saturation regions as well as the NMOS transistor M112, the voltage Vds2 between a drain and a source of the NMOS transistor M142 is represented by the following equation (c):Vds2=Vov   (c)Hence, a minimum voltage Vomin of the output terminal OUT is represented in the following equation (d):Vomin=Vds1+Vds2=2×Vov  (d)
At this point, several problems arise. When the voltage output from the output terminal OUT increases, power consumed at the output transistor in the constant-current circuit also increases. At the same time, when the output transistor is formed by connecting two MOS transistors in series, a chip area substantially increases, as a size of the output transistor for high-current output is extremely large. Furthermore, in the constant-current circuit shown in FIG. 7, a voltage between a drain and a source of the NMOS transistor M141 is constant, whereas the voltage Vds2 between the drain and the source of the NMOS transistor M142 fluctuates according to the external load 110. Thus, the voltages between the drain and the source of the NMOS transistors M141 and M142 are different, and the voltages between the gate and the source of the NMOS transistors M141 and M142 are also different. As a result, the voltages between the drain and the source of the NMOS transistors M111 and M112 are different as well, and systemic error in outputting the output current iout may be generated.
In order to solve the above-described problems, for example, another technique has been proposed as shown in FIG. 8. A constant-current circuit shown in FIG. 8 outputs a constant output current even when an external load connected to an output terminal OUT of the constant-current circuit varies and stably operates in a saturation region even when a voltage output from the output terminal OUT is small. In the constant-current circuit, provided that a variable resistor R is appropriately adjusted, voltages between a drain and a source of each of NMOS transistors NT1 and NT2 become equal without connecting the NMOS transistors NT1 and NT2 so as to form a cascode-type current mirror circuit. As a result, the constant-current circuit can output a constant current with high precision without systemic error.
However, such a technique has a drawback in that the voltage between the drain and the source of the NMOS transistor NT2 is controlled only in a limited range. A range of a voltage Vo output from the output terminal OUT that enables the constant-current circuit shown in FIG. 8 to output the constant current without the systemic error is represented in the following equation, in which a threshold voltage of the NMOS transistor NT2 and an overdrive voltage are represented as Vthn and Vov2, respectively:Vov2≦Vo≦Vthn+Vov2Accordingly, a variable range of the voltage Vo is extremely limited.